Author: Edgar Rodrigo Mancipe Toloza
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ABSTRACT: The main objective of this paper is to present the steps of how to program a PID controller in a FPGA, and in that way to control a DC motor using Pulse Width Modulation. Also we want to give some ideas to people interested in program embedded controllers in hardware.
During the project we will use some tools to help us to visualize the behavior of the controller on the computer screen through rs232 communication and LabView chart to plot, and LCD display for visualize the Set Point, gains and the current value.
KEYWORDS: PID, Control, FPGA, DE0-Nano, Embedded.
INTRODUCTION
Nowadays FPGA's have increased their popularity due the many ways to acquire it, reliability, and low costs. As a consequence of that, we can see more FPGA's applications in control systems.
For many years, microcontrollers used to be on the top of this field due their low-cost, but through years FPGA's have turned into a striking option, thanks to its main property of controlling many systems in parallel in the same embedded system.[1].
In this project we want to show in a quick way, how to program a PID control in FPGA using Verilog language, also we will change the values of Gain variables to see the behavior of the controlled value.
This article is not intended to give a definitive PID algorithm, the intention is to introduce and give some ideas for the readers of how to create and implement their own PID equation embedded in FPGA.
MATERIALS
This section will show the name of the main objects used in the analog and digital interface of the project for signal conditioning and power circuit.
BLOCK DIAGRAM OF THE CONTROLLER
Before start to program the FPGA, is necessary defining a strategy through a block diagram. In the Figure 6, we can see that the Set Point is selected using a Dip- switch and the feedback signal is coming from the quadrature encoder coupled to the DC motor. The error is the difference between Set Point and feedback (Encoder), and the error sign defines the rotation of the motor through the H Bridge. A Pulse Width Modulation (PWM) is the output signal of the PID algorithm that will change its Duty Cycle depending of the controller result.
Figure 6 Block Diagram of the controller.
PROGRAMMING
Once defined the strategy for the controller, we proceed to program the algorithm in HDL Verilog, using Quartus II. In this case we divided the entire Project in different sub-modules that will allow us to interpret and design in modular way, so that is going to be an advantage at the moment of write and understand the program lines
- SET POINT:
For the Set Point there are 5 predefined positions that will be selected through a dip-switch. Due that the encoder coupled to the gearmotor generates 8384 pulses per round is necessary to calculate the value for each position