Written by This email address is being protected from spambots. You need JavaScript enabled to view it.


Nios® II is an softcore 32-bit processor developed by Altera to be implemented over all Altera (INTEL) FPGA and SoC families. 

Some NIOS-II-e Gen2 features:

  • No license required.
  • Use fewer than 700 logic elements.
  • 6-stage pipeline runnning up to 30 DMIPS at 175 MHz in Nios II /e "economy" processor (Dhrystones 2.1 benchmark).
  • Deterministic and jitter free real-time performance.
  • Vector Interrupt Controller.
  • Custom instructions (ability to use FPGA hardware to accelerate a function).
  • Supported by industry-leading real-time operating systems (RTOS).
  • Nios II fast processor core can use a memory management unit (MMU) to run embedded Linux* operating system.

One way to optimize hardware resources use of Nios-II processor is implementing an real Time Operating System (RTOS) and NIOS-II is a excellent processor to run RTOS. Nios-II processor  is supported by a lot of RTOS and one of the most popular and robust is the FreeRTOS.

Some FreeRTOS features:

  • Free for use in commercial applications.
  • Scalable, simple and easy to use.
  • Simple - the core of the RTOS kernel is contained in only 3 .C files.
  • Scheduler can be configured for both preemptive or cooperative operation
  • Free tutorial books and training to educate engineers

In this article, we present all steps to implement the last FreeRTOS (v9.0) versión over the NIOS-II processor.  All step presented area developed in Quartus II 17.0 version and tested in DE0-nano development board.

Create Project using "DE0 Nano System Builder"

Open project using Quartus 17

From Quartus: File, Open Project..

Create NIOS-II instantiation using Qsys tool

  • From Quartus: Tools, Qsys..
  • Save as niosII.qsys
  • From IP catalog, include this components and configure.
IP component Name of component in project Detailed Configuration
clock_source clock_50
altera_nios2_gen2 cpu


altera_avalon_sysid_qsys sys_id
altera_avalon_new_sdram_controller sdram  
altera_avalon_epcs_flash_controller epcs  
altpll sys_pll


clock_source sys_clk  
altera_avalon_timer sys_clk_timer  
clock_source ram_clk  
altera_avalon_jtag_uart jtag  
altera_up_avalon_parallel_port LED_Pio  
altera_up_avalon_parallel_port Button_Pio  
altera_up_avalon_parallel_port Switch_Pio  
altera_avalon_uart uart  
altera_up_avalon_parallel_port IO_Pio  
  • Interconnect all components included in project in the next way.


Generate HDL of NIOS-II instantiation.

  • From Qsys: Generate, Generate HDL...


 Connect NIOS-II HDL with FPGA hardware pins.

  • write follow code in Quartus project, verilog file.
 niosII u0 (
.clk_clk (CLOCK_50), // clk.clk
.epcs_dclk (EPCS_DCLK), // epcs.dclk
.epcs_sce (EPCS_NCSO), // .sce
.epcs_sdo (EPCS_ASDO), // .sdo
.epcs_data0 (EPCS_DATA0), // .data0
.port_led_export (LED), // port_led.export
.port_key_export (KEY), // port_key.export
.port_sw_export (SW), // port_sw.export
.port_gpio_0_export (GPIO_0[31:0]), // port_gpio_0.export
.ram_clk_clk (DRAM_CLK), // ram_clk.clk
.reset_reset_n (1'b1), // reset.reset_n 
.uart_rxd (GPIO_0[32]), // uart.rxd
.uart_txd (GPIO_0[33]), // .txd
.sdram_addr (DRAM_ADDR), // sdram.addr
.sdram_ba (DRAM_BA), // .ba
.sdram_cas_n (DRAM_CAS_N), // .cas_n
.sdram_cke (DRAM_CKE), // .cke
.sdram_cs_n (DRAM_CS_N), // .cs_n
.sdram_dq (DRAM_DQ), // .dq
.sdram_dqm (DRAM_DQM), // .dqm
.sdram_ras_n (DRAM_RAS_N), // .ras_n
.sdram_we_n (DRAM_WE_N) // .we_n

Include NIOS-II HDL to Quartus Project

  • From Quartus: Project, Add/Remove files in Project..
  • Add niosII.qsys file to project. 


Compile Quartus project

  • From Quartus: Processing, Start Compilation.

 Programming FPGA DE0-nano.

  • From Quartus: Tools, Programmer
  • click over Start Button

Create C/C++ project from Eclipse IDE

  • From Quartus: Tools, Nios II Sofware Build Tool for Eclipse.
  • Select a workspace
  • From Eclipse: File, New, Nios II Application and BSP from Template

  • Create NIOS II application from template
    • Nios II SOPC: Search for niosII. sopcinfo in to project folder
    • Project Name: Whatever you want
    • Project Template: Hello World
    • Finish

 Import FreeRTOS to Eclipse Project

  • Include FreeRTOS folders to compile path in properties of Eclipse Nios Project.


Edit hello_wolrd.c to create task and run FreeRTOS.

In this example, in hello_wolrd.c are created two task. This is the "hello_world.c" code. Copy and paste in your own eclipse project.

 * [File Name]     hello_world.c
 * [Platform]      DE0-nano
 * [Project]       NiosII & FreeRTOS
 * [Version]       1.00
 * [Author]        ea.rincon11 - ErnestoARC
 * [Date]          24/07/2017
 * [Language]      'C'
 * [History]       1.20 - Edited from original file included in FreeRTOS V9.0.0 Nios Example
// Standard C/C++ Includes
#include <stddef.h>
#include <stdio.h>
#include <string.h>
// Scheduler Includes
#include "FreeRTOS.h"
#include "task.h"
#include "queue.h"
#include "partest.h"
// Constants
/* The rate at which the Print out message controlled by the 'Task1' */
#define mainTASK1_PERIOD	( 500 )
/* The rate at which the Print out message controlled by the 'Task2' */
#define mainTASK2_PERIOD	( 1000 )
/* Priority definitions for the tasks in the demo application. */
#define mainTASK1_PRIORITY		( tskIDLE_PRIORITY + 1 )
/* Priority definitions for the tasks in the demo application. */
#define mainTASK2_PRIORITY		( tskIDLE_PRIORITY + 2 )
// Function Prototypes
static void prvPrintTask1( void *pvParameters );
static void prvPrintTask2( void *pvParameters );
// Main Function
int main()
	/* Configure any hardware required for this demo. */
	printf("Hello from Nios II!\n");
	/* prvPrintTask1 uses sprintf so requires more stack. */
	xTaskCreate( prvPrintTask1, "Task1", configMINIMAL_STACK_SIZE, NULL, mainTASK1_PRIORITY, NULL );
	/* prvPrintTask2 uses sprintf so requires more stack. */
	xTaskCreate( prvPrintTask2, "Task2", configMINIMAL_STACK_SIZE, NULL, mainTASK2_PRIORITY, NULL );
      /* Finally start the scheduler. */
	/* Will only reach here if there is insufficient heap available to start
	the scheduler. */
	for( ;; );
  return 0;
static void prvPrintTask1( void *pvParameters )
	for( ;; )
		/* Wait until it is time to run the tests again. */
		vTaskDelay( mainTASK1_PERIOD / portTICK_PERIOD_MS);
        /* Print out an message */
        printf( "NIOS II Task1\r\n" );
        /*Control LED 1 DE0-NANO*/
static void prvPrintTask2( void *pvParameters )
	for( ;; )
		/* Wait until it is time to run the tests again. */
		vTaskDelay( mainTASK2_PERIOD / portTICK_PERIOD_MS);
        /* Print out an message */
        printf( "NIOS II Task2\r\n" );
        /*Control LED 2 DE0-NANO*/
// EOF


Compile and Program FreeRTOS Project into FPGA with NiosII

  • From eclipse: Project Build All
  • From eclipse: Run, Debug Configurations...
  • Click DEBUG and RUN debugger


Download complete project.

If you don´t want follow this steps, then download the Quartus, Qsys and Eclipse project.

Download this file (DE0Nano_NiosII_FreeRTOS.zip)NiosII and FreeRTOS Project[ ]18403 kB
Download this file (FreeRTOS.zip)FreeRTOS for NIOS-II [ ]295 kB
Powered by OrdaSoft!
  Written By Peter Gomez Este contenido esta orientado a los programadores que tienen problema con la conectividad("SGC PmmC") de su pantalla uOled-128-g1/g2…
Written by Sherneyko Plata Rangel   Pynq-z2: Hello world   In this tutorial we will implement a simple test of the inputs/outputs available on…
Objetivos Requerimientos Procedimiento Descripción de Hardware. Qsys. Nios II. UCOS II. Secuencia de Sprite. Sintesis de Audio. Descargas Glosario Otros Resultados. Ejemplo de Sprites.     Objetivos: Diseñar una plantilla general para el diseño de…
Written by Holguer A. Becerra           Requerimientos: DE0-NANO USB-UART(solo para parte 3) Python 2.7 ó superior.   Objetivos: Dar una introducción a los conceptos de Multitasking, Scheduling y…
Written by Holguer A. Becerra             Based on Gregory Estrade's Work.   I have ported the PC Engine System on the DE0-NANO back in 2014, why…
      Arduino tools are generally nice tools for quick prototyping and improvized projects, and the Seeeduino Xiao…
Written by: Holguer A Becerra         En esta practica vamos a construir nuestro primer juego retro  usando un sincronizador de Video VGA…
Written by: Andrea Paola Pabón Ortega & Daniel Enrique Mejia Rueda Revision by: Ing Holguer A. Becerra   DESCRIPCIÓN DEL PROYECTO: El  RTAWD DE0NANO…
  Written by Holguer Andres   Requires: DE0-NANO. 4.3 Inch 480x272 Screen.( WQVGA ) ?️       Parte HW: Descargue la siguiente plantilla( DE0_NANO_TFT_PSP.zip) y descomprimala en una ruta sin espacios y…
Escrito por Guillermo Acevedo   Diseño   En esta practica desarrollaremos un filtro FIR en hardware, para este caso en especifico, realizaremos un filtro…
 Written By Juan David Delgado   FILTRO FIR (FILTRO DE RESPUESTA FINITA AL IMPULSO)     Son conocidos como filtros digitales no recursivos debido a…
XISCKER: Reduced and Complex Instruction Set Computing Key Educational Resources A Configurable Platform for the Emulation of Different Computer Architectures An introduction to Computer Architectures through digital design description for FPGA devices   Computer Architecture embraces all three…
Escrito por: Alix Angarita   En el manual a continuación se explica un método de debug adicional que es muy interesante debido a…
By: Fabio Hernández   INTRODUCCIÓN:   El presente documento pretende mostrar la manera de generar software para una imagen de Linux implementada en la…
Summary Written by Fabio Hernandez   HARD PROCESSOR SYSTEM (HPS)     ------------------------------------------------------------------------------------------------------------------------------------------------   Introducción   Tenemos  2 nuclos de procesamiento ARM cortex-A9, cada uno son su propio cache  se…
Escrito por Jesus Lopez         INTRODUCCIÓN   El acceso directo a memoria (DMA, del inglés direct memory access) permite a cierto tipo de componentes de una computadora acceder a…
    Written by  Sebastian Baquero       Objetivos  Introducción a los conceptos de Multitasking, Scheduling y Context Switching.  Ampliación de los conceptos a cerca de el…