Holguer Andres

Position:: FPGA engineer at Photonic Inc

: Canada
: http://ece.ubc.ca/~hbecerra/

Git + Vivado (Project mode, GUI)
HDMI Core on DE0-NANO - Project
DAC MCP4821 Core - Verilog HDL
Creating a Shared library using Intel ARM SoC DS IDE and testing it with Python - Linux
Creating a Shared library using Vitis and testing it with Python - Petalinux
Three-Line delay buffers for Image Processing - DE2-115
Waves Graphing Acceleration using FPGA
Simple Tunnel Working on C
Build Petalinux for ZCU106 PS and PL based 10G Ethernet
UART Full Duplex Core - Verilog
PWM Core - Verilog
Motor Encoder Core - Verilog
DAC LTC2624 core - Verilog HDL
My first project on Zynq using Vivado from Scratch - PYNQ-Z2
VGA Retro Sprites and Sound Synthesis - DE0-NANO
FreeRTOS(Accelerometer-Vpython) - DE0-NANO
PC Engine / Turbografx-16 - DE0-NANO
Seeeduino Xiao - HID device to Shutdown Your Friend's Computer.
VGA Retro Game Introduction - DE0-NANO
WAV Player - DE0-NANO
LCD DRIVER(PSP SCREEN) with and without Nios II
FIR Filter Hardware Part 2 - DE0-NANO-SOC
FIR Filter Software Part 1 - DE0-NANO-SOC
X-ISCKER - IPCore
HPS System Console - DE0-NANO-SOC
HPS Software - DE0-NANO-SOC
HARD PROCESSOR SYSTEM (HPS) - DE0-NANO-SOC
DMA - DE0-NANO-SOC
FreeRTOS - DE0-NANO-SOC
UCOS II - DE0-NANO-SOC
Non-volatile - DE0-NANO-SOC
Nios II Custom Hardware - DE0-NANO-SOC
Karplus Strong Software Hardware Co-design - DE0-NANO-SOC
Nios II Karplus Software Based - DE0-NANO-SOC
Pipeline - DE0-NANO-SOC
Bresenham's Algorithm - DE0-NANO-SOC
Arduino Core - DE0-NANO-SOC
PicoCtrl - DE0-NANO-SOC
LFSRs, Cryptology in Python Part 1 - Software
VGA - DE0-NANO-SOC
3) Simulation and FSM Design - DE0-NANO-SOC
2) Introduction - DE0-NANO-SOC
Nios II Software
Coding USB-Serial using Android Studio
NIOS-II/e Gen2 processors and FreeRTOSv9.0.0 in Quartus 17.0.0
SNES Controller Module - DE0-NANO-SOC
Introduction to HLS (High Level Synthesis)
Wiznet 5100 Core
Adding tasks to Linux Initialization using inittab - DE0-NANO-SOC
N64 Controller Module - DE0-NANO
Nios II Hardware
Generador de efectos de audio utilizando HDL Coder de simulink
DE0 NANO PlayStation Controller Interface
Setting the D5M Terasic Camera using Nios II at 1080p
Turning On qsys debug messages
Booting Nios® II from Quad Serial Configuration (EPCQ), Cyclone V GX Starter Kit.
Data Sync - DE0-NANO-SOC
NCO - DE0-NANO-SOC
4) IP Catalog - DE0-NANO-SOC
DE0-NANO-SOC

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Adding tasks to Linux Initialization using inittab - DE0-NANO-SOC
Arduino Core - DE0-NANO-SOC
Nios II Hardware
NIOS-II/e Gen2 processors and FreeRTOSv9.0.0 in Quartus 17.0.0
HPS Software - DE0-NANO-SOC
DMA - DE0-NANO-SOC
FIR Filter Hardware Part 2 - DE0-NANO-SOC
Generador de efectos de audio utilizando HDL Coder de simulink
UCOS II - DE0-NANO-SOC
FIR Filter Software Part 1 - DE0-NANO-SOC
Boards
Karplus Strong Software Hardware Co-design - DE0-NANO-SOC
Turning On qsys debug messages
HARD PROCESSOR SYSTEM (HPS) - DE0-NANO-SOC
3) Simulation and FSM Design - DE0-NANO-SOC

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