Written by Holguer Andres

  1. Quartus Configuration:
    1. Open and modify the <project>.qsf file with a text editor and add the following lines:
      set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "ACTIVE SERIAL X1"
      set_global_assignment -name ENABLE_INIT_DONE_OUTPUT ON​
    2. Delete the “db” and “incremental_db” folder if it is needed.
    3. Open your Qsys Project.
    4. Ensure the Nios II’s reset vector is pointing at EPCS/EPCQ Controller.
    5. Ensure the Nios II’s Exception Vector is pointing at the memory of your preference, sram, lpddr2, or memory on chip.
    6. Generate your Qsys design.
    7. Compile your design with Quartus.
  2. Open Nios II IDE.
    1. Create a new project.
    2. Right-click on the folder and go to Nios II-> BSP Editor.
    3. Make sure you have the following setup.

    4. Generate the BSP, and exit
    5. Right -Click  and Build the software
  3. Open Nios II Command Shell.
    1. Go to the folder in which <software>.elf is stored.
    2. Type the following lines (it might change on yours) on the console
  4. Generating non_volatil.jic file and programming the EPCQ.
    1. Go to Quartus and then File->Conver Programming Files…
    2. Select the following configuration:



    3. Press on Flash Loader, then on “Add Device..” and then Select Cyclone V -> 5CGXF5C6, and press ok.


    4. Press on SOF Data, then press on Add File, and Select your <quartus>.sof file.
    5. Press on the <quartus>.sof file, press properties, and enable compression, and press on ok.
    6. Press on “Add Hex Data..”, select the “sw.hex” file which was generated in the step 3, and enable “Relative addressing”.
    7. At the end, you might have something like the following (The same order).
    8. Press on “Generate”.
    9. Open Quartus Programmer, and make sure you have the board connected to the USB.
    10. Press on “Add File…”, select the non_volatil.jic file, enable “program/configure”.
    11. Finally, press on “Start”.
    12. In order to check everything works fine, restart your board.
    13. Nios II should be running.

 

You can find the jic file and the solution in the following link

https://github.com/Adrizcorp/FPGAs/tree/master/Cyclone%20V%20GX%20Starter%20Kit/Booting%20Nios%20II%20Example/Template

 

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